RESEARCH AREAS

The research activities of the MINARC team fall under two broad categories.

Area 1 : Ultimate CMOS and Beyond

Permanent members : Prof. Amara, Mr. Amiel, Dr. Anghel, Prof. Vladimirescu.

Key words : Double Gate FDSOI (DG-FDSOI), Fully Depleted SOI (FDSOI), Low Power, Low voltage, Non Volatile Memory (NVM), Process Variability (PV), Silicon On Insulator (SOI), Static Read Access memory (SRAM), Tunneling Field effect Transistor (TFET).

The main objective of this research area is designing CMOS circuits that operate at the lowest possible supply voltage (with most transistors operating in sub threshold). Our interests cover analog/RF, digital circuits for standard-cell libraries, and memories implemented in both CMOS-bulk and SOI technology. Important contributions of our group in the area of SRAMs resulted in novel memory cells in CMOS-SOI using 4, 5 and 8 transistors operating at 0.4V with better noise margins in the retention, read and write modes, when compared to 6-transistor structures.

Another important research direction of our group is CMOS design under high parameter variation encountered in devices below 100nm. For bulk-CMOS circuits we concentrate on circuit innovation and design constraint definition that minimizes the impact of poorer parameter tolerances. We also investigate circuits fabricated in new processes such as FDSOI, Multi-gate SOI with reduced process variations, as well as circuits using new components such as nanowire transistors and molecular electronics.

An important activity is device research looking beyond the ubiquitous CMOS transistor to alternative configurations of the MOS devices such as the tunnel-FET transistor (TFET), impact-ionization transistor (IMOS), molecular transistors, MOS transistors in accumulation mode, silicon nanowires and carbon nanotubes. At the present time we are concentrating on the study and improvement of two lesser-known but promising structures: the TFET and the IMOS, focusing specifically on improving the I_ON of the TFET and the reliability of the IMOS.

The TFET is a structure that can replace conventional CMOS transistors in ultra low-power applications since it has a steeper subthreshold slope (lower than 60mV/dec) compared to CMOS, which makes the TFET a better switch than the CMOS. The main drawback of the TFET is its lower conduction current I_ON (at least 10 times lower than for CMOS). The other most promising structure is the impact-ionization MOS (IMOS) transistor. As with the TFET, the sub-threshold slope of the IMOS is steeper than that for CMOS; its main drawback is its reliability: impact ionization reduces the lifetime of the structure to some second or some hours.

Another part of our device research is the development of TCAD models for the new components. TCAD tools such as Atlas are used to study the behavior of different implementations of these novel devices and analyze the physical processes at work. Based on these device-level models we develop circuit-level models in VHDL and Verilog-AMS for studying the feasibility and robustness of circuits designed using these new components.

Area 2: Circuits and Systems for wireless communications and biomedical applications

Permanent professors: Prof. Amara, Dr. Chan Wai Po, Dr. Godara, Dr. X. Zhang.

Key words: Agile receivers, Biomedical implants, Body Area networks (BAN), Medium Access (MAC), Reconfigurable processing unit, Ultra Wide Band (UWB).

Our research goals in the area of new applications are situated in the zone where electronics and radio-communications converge.

A first potential for application is in the biomedical field. Our research projects include: Energy-efficient communication protocols for heterogenous Body-area networks (partner: Sorin group); Multi-electrode cardiac stimulation (partner: Sorin group); Self-adaptive front-ends for biomedical radios (partner: CEA-LETI); Feasibility of UWB and RFID for monitoring biomedical parameters (partner: EMKA), etc.

The second field of application wireless communications systems, with the aim of developing agile and reconfigurable components and sub-systems. Some of our projects in this include: Agile filters for RF and microwave applications (partner: Thales Airborne Systems); power-efficient MAC protocols for 3GPP LTE (partner: Chinese Academy of Science); Partial reconfiguration of ASICs by integrating FPGAs (partner: Adiscys), etc.

Team

Head: Dr. Balwant Godara

Prof. Amara Amara

Mr. Frédéric Amiel

Dr. Costin Anghel

Dr. Francis Chan Wai Po

Prof. Andrei Vladimirescu

Dr. Xun Zhang

Short Bios of team members

Prof. Amara Amara

Prof. Amara Amara obtained his Ph.D. in computer science in 1989 following a Master in 1984 in microelectronics and computer science, both from Paris VI University. From 1989 to 1992, he was assistant professor developing microelectronics academic programs for the Microelectronic Center of Paris Ile-de-France. In 1992, he joined the ISEP as in-charge of the microelectronics laboratory where he headed a team involved in High Speed GaAs VLSI circuit design. His current position at the ISEP is Deputy Managing Director in charge of Research and International Cooperation. His research interests are mainly focused on low-power circuit design techniques, design-technology interaction for advanced technologies and robust circuits design. Amara is a Member of the IEEE Circuit and Systems society "Board of governors" and General Vice President of the France IEEE Section since Jan. 2008. From 2000 to 2004 he was Chairman of the IEEE-CAS France Chapter (and recipient of the 2004 Chapter of the Year Award and a Certificate of Appreciation from IEEE Regional Activities). He was member of the French CEA (Atomic Energy Agency) Scientific Committee, member of numerous conference technical program committees and organizing committees and member of the Editorial Board of MicroElectronics Journal. Amara is the General Chair of ISCAS 2010. He has published numerous papers in international conferences and journals, including a book on molecular electronics in 2008 and a book on double-gate circuit design in 2009. He is currently adviser of many PhD students.

Mr. Frédéric Amiel

Frédéric Amiel obtained a DEA (MSc) in Information Systems in 1985, one year after his electronics engineering degree. He worked in several small companies as a hardware developer and joined the ISEP in 1992. Since this time he is assistant professor, in charge of the digital electronics laboratory. He has also worked as a consultant engineer for several companies and was in-charge of several programmes in digital electronics, DSP and FPGA technologies. He is currently in- charge of the Electronics program and Embedded Systems major at ISEP and a member of the MINARC research team. His research concerns hardware architectures for specialized computing, and most recently, FPGA power consumption.

Dr. Costin Anghel

Costin Anghel joined the research team at ISEP in July 2008. He obtained his Ph.D. from Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland (1st European University and 15th Worldwide in Engineering/Technology and Computer Sciences, Shanghai ranking). After the Ph.D. he was employed as a project leader in the Electronics Laboratory, EPFL, Switzerland. In 2006 he obtained a Post-Doc fellowship at Commissariat à l'Énergie Atomique (CEA) LETI. During his Post-Doc he has worked mainly in the field of molecular electronics. His research interests include advanced devices like Tunnel Field Effect Transistors, organic/molecular devices, carbon nanotubes and their applications in electronics.

Dr. Francis Chan Wai Po

Francis Chan Wai Po received the engineering diplôma from the ENSEIRB (Ecole Nationale Supérieure d'Electronique, Informatique et Radiocommunication de Bordeaux) and the PhD in Microelectronics from the University of Bordeaux, in 2004 and 2010 respectively. His PhD work was carried out at the CEA-LETI in collaboration with ELA Medical and the IMS Laboratory and was mainly focused on the design of a low power RF front-end transceiver with automatic power efficiency optimization for biomedical implants. He has since joined the MINARC research team at the ISEP, where his current field of research is the design of analogue and radiofrequency integrated circuits for wireless applications.

Dr. Balwant Godara

Balwant Godara obtained his engineering degree in Electronics from the Indian Institute of Technology, New Delhi, India en 2002 and followed it with a PhD in Microelectronics from the University of Bordeaux, France, in 2006. An assistant professor at the ISEP since 2007, Godara is currently working on electronics systems for cognitive radio, ultrawideband and biomedical applications. Author of 1 book and 12 journal papers, Godara has also presented his work at over 35 international conferences (including 10 invited papers). He is advisor to two PhD students.

Prof. Andrei Vladimirescu

Andrei Vladimirescu received his Diploma Engineering from the Polytechnic Institute of Bucharest and the MS and PhD degrees from the University of California, Berkeley, where he was a main contributor to the circuit simulator SPICE. Andrei conceived and managed the development of a number of analog and mixed-signal Electronic Design Automation (EDA) products for Daisy Systems, Analog Design Tools, Valid and Cadence. Today, Andrei is a Professor at the University of California at Berkeley, associated with the Berkeley Wireless Research Center, and at the Institut Superieur d'Electronique de Paris. His research activities are in the areas of circuit simulation and modeling, low-power and ultra-low-voltage (ULV) design and modeling, analog and RF circuit design, new devices, modeling and optimization, and, electrical simulation for special architectures. Professor Vladimirescu is the author of "The SPICE Book" published by J. Wiley and Sons in 1994, co-author of a book on double-gate circuit design in 2009, and, author and co-author of over 50 journal and conference papers on circuits, device modeling and circuit simulation. Andrei is a member of the Technical Program Committee of ESSCIRC/ESSDERC and is part of the Editorial Board of the BioNanoScience Journal published by Springer.

Dr. Xun Zhang

Dr. Xun Zhang, who obtained a B.E. degree from Wuhan university of technology, an M.E. degree from Université Marrie Pierre Curie in 2005, and PhD from Nancy university in 2009. He obtained a Post-Doc fellowship of Motorola Fondation in IETR/SCEE at Supélec in 2010. He is currently employed as associate professor in MINARC team of laboratory at the Institut Supérieur d'Electronique de Paris (ISEP). His research activities involve reconfigurable computing, cognitive radio design and low power microprocessor design.

PhD students:

Hraziia Heni, Design and simulation of Non -Volatile MRAMs

Leïla Kamoun, Agile microwave band-reject filters

Rutwik K. Kashyap, Double-gate device modeling

Adam Makosiej, Design of SRAM using UT2B-FDSOI

Giorgio Palma, Process optimisation and design of non-volatile memories

Bertrand Peyroux-Prayer, Exploitation of 22nm FDSOI for low-power digital applications

Islam Seoudi, Multi-lead pacemakers

Khaja A. Sheikh, Ultra low power variation-resilient SRAM sense amplifier